Semiconductor devices, such as integrated circuit chips, are electrically connected to leads on a lead frame by a process known as wire bonding. The wire bonding operation involves placing and connecting a wire to electrically connect a pad residing on a die (semiconductor chip) to a lead in a lead frame. Once all the pads and leads on the chip and the lead frame have been wire bonded, it can be packaged, often in ceramic or plastic, to form an integrated circuit device. In a typical application, a die or chip may have hundreds of pads and leads that need to be connected.
As circuit density of integrated circuit chips has increased, the configuration of the lead frames, which provide input and output to the chips, has also become increasingly complex. The leads to which wire bonds must be made have become increasingly smaller, more varied in shape, and more numerous and, therefore, more difficult to form wire bonds thereto.
Before bonding, the wire bonder system learns the expected positions and orientations of the die, the lead frame, the pads, and the leads. Typically, the location and orientation of the die are indicated with respect to two reference points, such as fiducials. The wire bonder learns the pad shape and the pad locations on the die. Similarly, the location of the lead frame is indicated by one or more reference points, and the wire bonder learns the lead positions with respect to the lead frame.
The position of the target bond points on the leads is determined in a number of ways. In one technique, operators manually place a location of a target bond point on each lead to train the location of the leads and the target bond points to the system. In another technique, such as that described in U.S. Pat. No. 5,119,436, (the '436 patent) a manually trained location of a target bond point is refined by the pattern recognition systems of the wire bonder. The system then automatically determines a location of target bond points on successive leads.
The wire bonder uses the trained data, during operation, to bond the wires. Before bonding, typically, the system relocates the leads. However, for various reasons, some of the bonds formed are unacceptable.
Unacceptable bonds include, for example, missed bonds, misshapen bonds, or partial bonds. A missed bond is positioned off the lead and fails to form the electrical connection required for proper operation of the chip. A partial bond passes electrical testing during quality inspection, but will typically fail in the field.
Among other reasons, unacceptable bonds occur because of improper placement of the target bond position along the normal axis of the leads. For instance, the trained target bond position can be too far to the side of a lead. Further, when the training information about target bond points is applied to subsequent parts, the variation among the parts can cause unacceptable bonds, particularly if a trained bond position was offset from the center of the lead.
Among other reasons, unacceptable bonds also occur because of errors in lead detection. Lead detection errors can occur because of non-robust techniques, such as the one-dimensional scanning of intensities employed in the '436 patent, cited above, poor image quality, or a combination of both. Poor image quality is caused by poor lighting, poor focusing, specular reflections off the leads and the background of the image, noise, and irregularities in the surface of the leads, among other causes, as is known in the art.
A further reason for unacceptable bonds is the failure or inaccurate resolution of the target bond position along the length of the leads. The manual method does not resolve the target bond position along the length of the leads. Although the manual method is reasonably accurate and robust for large leads with parallel sides, typically its failure rate is high for smaller leads and leads with non-parallel sides. The '436 patent does resolve the target bond position along the length of the leads for parallel leads. The lack of robustness of the '436 patent, either alone or combined with poor image quality, however, leaves unclear the effect of the length resolution on the number of unacceptable bonds.
Further, the '436 patent does not address non-parallel leads.